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The RIVYERA Architecture Family

November 2010

The new RIVYERA computing-architecture is the technological successor of the COPACOBANA architecture. It provides up to 128 User FPGAs per single machine connected via a High-Throughput bus system. The RIVYERA FPGA supercomputer is connected via a high speed, low latency interface with a standard e-ATX Intel based main board. An easy to use API as well as 12 GBytes of ECC DDR3 memory, 4 Gbytes RAM and up to 4096 Gbyte of Flash memory per single machine allows your algorithms to be ported easily. The low energy-consumption of 650 Watts, in combination with the improved bus-system and low space requirements of only 3U in a 42U standard server rack, makes the RIVYERA a perfect choice also for setting up high density and large scale FPGA-clusters if a single machine is not yet enough.

Main application areas include - but are not limited to - bioinformatics, financial mathematics and services, scientific or engineering simulation, cryptography and many others.

Have a look by yourself at the RIVYERA machine.
RIVYERA Architecture